Product specifications
            The CS43198 is a next generation, low power audio DAC that provides a superior system-level audio performance without draining battery life. This IC minimizes board space requirements while enabling performance and features to drive design differentiation. The CS43198 features a high impedance of 600 Ω, a 130 dBA dynamic range, a THD+N rating of -115 dB, and inter channel isolation of >110 dB. To minimize pre-echos and ringing artifacts, the CS43198 is designed with proprietary digital-interpolation filters that support five selectable digital filter responses. Filtering options include low group delay with pseudo-linear phase and a fast or slow roll-off. A patented on-chip DSD processor supports up to DSD256 in direct mode to preserve audio integrity by providing non-decimating volume control with soft ramp, and 50 kHz filtering as recommended by Scarlet Book. Volume matching of the analog output levels and channel mixing enable a seamless transition between the DSD and PCM playback paths. The CS43198 is available in a 40-pin QFN or a 42-ball WLCSP packages.
Features
•	CS43198 is the evolution of the CS4399. Re-defining Audio again
o	Improved output level up to 2 VRMS
o	Evolved performance: THD+N increased from -108 dB to -115 dB
o	Increased hi-fi DSD playback rate from DSD128 to DSD256
•	Advanced 32-bit oversampled multi-bit modulator with mismatch shaping technology
o	Eliminates distortion due to on-chip component mismatch
o	Supports up to 384 kHz sampling frequency
o	Low clock jitter sensitivity
o	Auto mute detection
•	Serial audio input
o	I²S, right-justified, left-justified, DoP, DSD and TDM interface
o	Main or secondary operation
o	Volume control with 0.5 dB step size and soft ramp
o	44.1 kHz de-emphasis and inverting feature
•	Patented dedicated DSD processor featuring high resolution audio format support
o	DirectStream Digital™ (DSD)
o	DSD over PCM (DSD DoP), up to DSD256
o	Handles switching between DSD and PCM audio streams, matching the analog audio output level
•	Integrated PLL
o	Reference clock sourced from MCLK pin
o	System clock output
•	1 MHz I²C and hardware mode control